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HCF40194B
4-BIT BIDIRECTIONAL UNIVERSAL SHIFT REGISTER
s
s s
s s
s s s
s s
MEDIUM SPEED OPERATION : 12 MHz (Typ.) at 10V FULLY STATIC OPERATION SYNCHRONOUS PARALLEL OR SERIAL OPERATION ASYNCHRONOUS MASTER RESET STANDARDIZED SYMMETRICAL OUTPUT CHARACTERISTICS QUIESCENT CURRENT SPECIF. UP TO 20V 5V, 10V AND 15V PARAMETRIC RATINGS INPUT LEAKAGE CURRENT II = 100nA (MAX) AT VDD = 18V TA = 25C 100% TESTED FOR QUIESCENT CURRENT MEETS ALL REQUIREMENTS OF JEDEC JESD13B "STANDARD SPECIFICATIONS FOR DESCRIPTION OF B SERIES CMOS DEVICES"
DIP
ORDER CODES
PACKAGE DIP TUBE HCF40194BEY T&R
DESCRIPTION HCF40194B is a monolithic integrated circuit fabricated in Metal Oxide Semiconductor technology available in DIP packages. HCF40194B is a universal shift register featuring parallel inputs, parallel outputs, SHIFT RIGHT and SHIFT LEFT serial inputs, and a direct overriding clear input. In the parallel-load mode (S0 and S1 are high), data is loaded into the associated flip-flop and appears at the output after the
positive transition of the CLOCK input. During loading, serial data flow is inhibited. Shift right and shift left are synchronously accomplished on the positive clock edge with data entered at the SHIFT RIGHT and SHIFT LEFT serial inputs, respectively. Clocking of the register is inhibited when both mode control inputs are low. When low, the RESET input resets all stages and forces all outputs low. HCF40194B is similar to industry types 340194 and MC40194.
PIN CONNECTION
September 2002
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HCF40194B
IINPUT EQUIVALENT CIRCUIT PIN DESCRIPTION
PIN No 1 3, 4, 5, 6 15, 14, 13, 12 2 7 11 9, 10 8 16 SYMBOL RESET D0 to D3 Q0 to Q3 Shift Right IN Shift Left IN CLOCK S0, S1 VSS VDD NAME AND FUNCTION Reset Input Inputs Outputs Shift Righ Input Shift Left Input Clock Input Input (High) Negative Supply Voltage Positive Supply Voltage
FUNCTIONAL DIAGRAM
TRUTH TABLE
MODE SELECT CLOCK S0 X L H L H X
X : Don't Care
RESET S1 L L H H X H H H H L
ACTION NO CHANGE SHIFT RIGHT (Q0 toward Q3) SHIFT LEFT (Q3 toward Q0) PARALLEL LOAD RESET
X
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LOGIC DIAGRAM
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HCF40194B
ABSOLUTE MAXIMUM RATINGS
Symbol VDD VI II PD Top Tstg Supply Voltage DC Input Voltage DC Input Current Power Dissipation per Package Power Dissipation per Output Transistor Operating Temperature Storage Temperature Parameter Value -0.5 to +22 -0.5 to VDD + 0.5 10 200 100 -55 to +125 -65 to +150 Unit V V mA mW mW C C
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied. All voltage values are referred to VSS pin voltage.
RECOMMENDED OPERATING CONDITIONS
Symbol VDD VI Top Supply Voltage Input Voltage Operating Temperature Parameter Value 3 to 20 0 to VDD -55 to 125 Unit V V C
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HCF40194B
DC SPECIFICATIONS
Test Condition Symbol Parameter VI (V) 0/5 0/10 0/15 0/20 0/5 0/10 0/15 5/0 10/0 15/0 0.5/4.5 1/9 1.5/13.5 4.5/0.5 9/1 13.5/1.5 2.5 4.6 9.5 13.5 0.4 0.5 1.5 VO (V) |IO| VDD (A) (V) 5 10 15 20 5 10 15 5 10 15 5 10 15 5 10 15 5 5 10 15 5 10 15 18 TA = 25C Min. Typ. 0.04 0.04 0.04 0.08 4.95 9.95 14.95 0.05 0.05 0.05 3.5 7 11 1.5 3 4 -1.36 -0.44 -1.1 -3.0 0.44 1.1 3.0 -3.2 -1 -2.6 -6.8 1 2.6 6.8 10-5 5 -1.1 -0.36 -0.9 -2.4 0.36 0.9 2.4 3.5 7 11 1.5 3 4 -1.1 -0.36 -0.9 -2.4 0.36 0.9 2.4 Max. 5 10 20 100 4.95 9.95 14.95 0.05 0.05 0.05 3.5 7 11 1.5 3 4 Value -40 to 85C Min. Max. 150 300 600 3000 4.95 9.95 14.95 0.05 0.05 0.05 -55 to 125C Min. Max. 150 300 600 3000 Unit
IL
Quiescent Current
A
VOH
High Level Output Voltage Low Level Output Voltage High Level Input Voltage Low Level Input Voltage Output Drive Current
VOL
VIH
VIL
IOH
IOL
Output Sink Current Input Leakage Current Input Capacitance
0/5 0/5 0/10 0/15 0/5 0/10 0/15 0/18
<1 <1 <1 <1 <1 <1 <1 <1 <1 <1 <1 <1 <1 <1 <1 <1 <1 <1 <1
V
V
V
V
mA
mA
II
Any Input Any Input
0.1
7.5
1
1
A
pF
CI
The Noise Margin for both "1" and "0" level is: 1V min. with VDD =5V, 2V min. with VDD=10V, 2.5V min. with VDD=15V
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HCF40194B
DYNAMIC ELECTRICAL CHARACTERISTICS (Tamb = 25C, CL = 50pF, RL = 200K, tr = tf = 20 ns)
Test Condition Symbol Parameter VDD (V) 5 10 15 5 10 15 5 10 15 5 10 15 5 10 15 5 10 15 5 10 15 5 10 15 5 10 15 5 10 15 5 10 15 5 10 15 Min. Value (*) Typ. 220 100 70 45 25 20 100 50 40 80 35 20 200 110 65 -65 -25 -15 -170 -95 -55 90 40 25 6 12 15 Max. 440 200 140 90 50 40 200 100 80 100 70 50 400 220 130 0 0 0 0 0 0 180 180 50 ns Unit
tPHL tPLH Propagation Delay Time Clock to Q tPHZ
ns
tTHL tTLH Transition Time
ns
tsetup
Setup Time D0, D3, SR, SL to Clock SO, S1 to Clock
ns
ns
thold
Hold Time D0, D3, SR, SL to Clock SO, S1 to Clock
ns
ns
tW
Clock Pulse Width
ns
fCL
Clock Input Frequency
3 6 8
MHz 1000 100 100 300 200 140 460 180 130
tr , tf
Clock Input Rise or Fall Time Reset Pulse Width
s
tW
tPRHL
Propagation Delay Reset
150 100 70 230 90 65
ns
ns
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HCF40194B
TEST CIRCUIT
CL = 50pF or equivalent (includes jig and probe capacitance) RL = 200K RT = ZOUT of pulse generator (typically 50)
WAVEFORM 1 : CK TO Q PROPAGATION DELAY TIMES (f=1MHz; 50% duty cycle)
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WAVEFORM 2 : SI, SO SETUP AND HOLD TIMES (f=1MHz; 50% duty cycle)
WAVEFORM 3 : PROPAGATION DELAY TIME (f=1MHz; 50% duty cycle)
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WAVEFORM 4 : PROPAGATION DELAY TIME, RESET MINIMUM PULSE WIDTH (f=1MHz; 50% duty cycle)
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Plastic DIP-16 (0.25) MECHANICAL DATA
mm. DIM. MIN. a1 B b b1 D E e e3 F I L Z 3.3 1.27 8.5 2.54 17.78 7.1 5.1 0.130 0.050 0.51 0.77 0.5 0.25 20 0.335 0.100 0.700 0.280 0.201 1.65 TYP MAX. MIN. 0.020 0.030 0.020 0.010 0.787 0.065 TYP. MAX. inch
P001C
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HCF40194B
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. (c) The ST logo is a registered trademark of STMicroelectronics (c) 2002 STMicroelectronics - Printed in Italy - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia - Malta - Morocco Singapore - Spain - Sweden - Switzerland - United Kingdom - United States. (c) http://www.st.com
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